Collectively patterned stacked memory has been proposed as a method to increase the capacity and reduce the cost of semiconductor memory devices. Collectively patterned stacked memory is manufactured by forming a stacked body on a semiconductor substrate by alternately stacking insulating films and electrode films, subsequently making a through-hole in the stacked body using lithography, depositing a blocking layer, a charge storage layer, and a tunneling layer in this order inside the through-hole, and filling a silicon pillar into the through-hole. In such a stacked memory, memory cells are formed by forming memory transistors at the intersections between the electrode films and the silicon pillar. A peripheral circuit region is provided in addition to the memory region where the stacked body is formed; and a drive circuit that drives the memory cells is formed in the peripheral circuit region. The end portion of the stacked body has a stairstep configuration in which a terrace is formed for each electrode film; and a contact is electrically connected to each of the electrode films.